// SPDX-License-Identifier: GPL-2.0-or-later
// Copyright 2019 IBM Corp.

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/ast2600-clock.h>

/ {
	model = "Aspeed BMC";
	compatible = "aspeed,ast2600";
	#address-cells = <1>;
	#size-cells = <1>;
	interrupt-parent = <&gic>;

	aliases {
		serial4 = &uart5;
	};


	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		enable-method = "aspeed,ast2600-smp";

		cpu@f00 {
			compatible = "arm,cortex-a7";
			device_type = "cpu";
			reg = <0xf00>;
		};

		cpu@f01 {
			compatible = "arm,cortex-a7";
			device_type = "cpu";
			reg = <0xf01>;
		};
	};

	timer {
		compatible = "arm,armv7-timer";
		interrupt-parent = <&gic>;
		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
		clocks = <&syscon ASPEED_CLK_HPLL>;
		arm,cpu-registers-not-fw-configured;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		device_type = "soc";
		ranges;

		gic: interrupt-controller@40461000 {
			compatible = "arm,cortex-a7-gic";
			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
			#interrupt-cells = <3>;
			interrupt-controller;
			interrupt-parent = <&gic>;
			reg = <0x40461000 0x1000>,
			    <0x40462000 0x1000>,
			    <0x40464000 0x2000>,
			    <0x40466000 0x2000>;
			};

		mdio0: mdio@1e650000 {
			compatible = "aspeed,ast2600-mdio";
			reg = <0x1e650000 0x8>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		mdio1: mdio@1e650008 {
			compatible = "aspeed,ast2600-mdio";
			reg = <0x1e650008 0x8>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		mdio2: mdio@1e650010 {
			compatible = "aspeed,ast2600-mdio";
			reg = <0x1e650010 0x8>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		mdio3: mdio@1e650018 {
			compatible = "aspeed,ast2600-mdio";
			reg = <0x1e650018 0x8>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		mac0: ftgmac@1e660000 {
			compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
			reg = <0x1e660000 0x180>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
			status = "disabled";
		};

		mac1: ftgmac@1e680000 {
			compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
			reg = <0x1e680000 0x180>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
			status = "disabled";
		};

		mac2: ftgmac@1e670000 {
			compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
			reg = <0x1e670000 0x180>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>;
			status = "disabled";
		};

		mac3: ftgmac@1e690000 {
			compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
			reg = <0x1e690000 0x180>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>;
			status = "disabled";
		};

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			syscon: syscon@1e6e2000 {
				compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd";
				reg = <0x1e6e2000 0x1000>;
				ranges = <0 0x1e6e2000 0x1000>;
				#address-cells = <1>;
				#size-cells = <1>;
				#clock-cells = <1>;
				#reset-cells = <1>;

				pinctrl: pinctrl {
					compatible = "aspeed,ast2600-pinctrl";
				};

				smp-memram@180 {
					compatible = "aspeed,ast2600-smpmem";
					reg = <0x180 0x40>;
				};
			};

			rng: hwrng@1e6e2524 {
				compatible = "timeriomem_rng";
				reg = <0x1e6e2524 0x4>;
				period = <1>;
				quality = <100>;
			};

			rtc: rtc@1e781000 {
				compatible = "aspeed,ast2600-rtc";
				reg = <0x1e781000 0x18>;
				interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
				status = "disabled";
			};

			uart5: serial@1e784000 {
				compatible = "ns16550a";
				reg = <0x1e784000 0x1000>;
				reg-shift = <2>;
				interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
				no-loopback-test;
			};

			wdt1: watchdog@1e785000 {
				compatible = "aspeed,ast2600-wdt";
				reg = <0x1e785000 0x40>;
			};

			wdt2: watchdog@1e785040 {
				compatible = "aspeed,ast2600-wdt";
				reg = <0x1e785040 0x40>;
				status = "disabled";
			};

			wdt3: watchdog@1e785080 {
				compatible = "aspeed,ast2600-wdt";
				reg = <0x1e785080 0x40>;
				status = "disabled";
			};

			wdt4: watchdog@1e7850C0 {
				compatible = "aspeed,ast2600-wdt";
				reg = <0x1e7850C0 0x40>;
				status = "disabled";
			};

			sdc: sdc@1e740000 {
				compatible = "aspeed,ast2600-sd-controller";
				reg = <0x1e740000 0x100>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x1e740000 0x10000>;
				clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
				status = "disabled";

				sdhci0: sdhci@1e740100 {
					compatible = "aspeed,ast2600-sdhci", "sdhci";
					reg = <0x100 0x100>;
					interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
					sdhci,auto-cmd12;
					clocks = <&syscon ASPEED_CLK_SDIO>;
					status = "disabled";
				};

				sdhci1: sdhci@1e740200 {
					compatible = "aspeed,ast2600-sdhci", "sdhci";
					reg = <0x200 0x100>;
					interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
					sdhci,auto-cmd12;
					clocks = <&syscon ASPEED_CLK_SDIO>;
					status = "disabled";
				};
			};

			emmc: sdc@1e750000 {
				compatible = "aspeed,ast2600-sd-controller";
				reg = <0x1e750000 0x100>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x1e750000 0x10000>;
				clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>;
				status = "disabled";

				sdhci@1e750100 {
					compatible = "aspeed,ast2600-sdhci";
					reg = <0x100 0x100>;
					sdhci,auto-cmd12;
					interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
					clocks = <&syscon ASPEED_CLK_EMMC>;
					pinctrl-names = "default";
					pinctrl-0 = <&pinctrl_emmc_default>;
				};
			};
		};
	};
};

#include "aspeed-g6-pinctrl.dtsi"
